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sn54abt16240a, sn74abt16240a 16-bit buffers/drivers with 3-state outputs scbs095g december 1991 revised october 1998 1 post office box 655303 ? dallas, texas 75265 members of the texas instruments widebus ? family state-of-the-art epic- ii b ? bicmos design significantly reduces power dissipation typical v olp (output ground bounce) < 1 v at v cc = 5 v, t a = 25 c distributed v cc and gnd pin configuration minimizes high-speed switching noise flow-through architecture optimizes pcb layout high-drive outputs (32-ma i oh , 64-ma i ol ) latch-up performance exceeds 500 ma per jesd 17 esd protection exceeds 2000 v per mil-std-883, method 3015; exceeds 200 v using machine model (c = 200 pf, r = 0) package options include plastic shrink small-outline (dl), thin shrink small-outline (dgg), and thin very small-outline (dgv) packages and 380-mil fine-pitch ceramic flat (wd) package using 25-mil center-to-center spacings description the 'abt16240a devices are 16-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. these devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. these devices provide inverting outputs and symmetrical active-low output-enable (oe ) inputs. to ensure the high-impedance state during power up or power down, oe should be tied to v cc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. the sn54abt16240a is characterized for operation over the full military temperature range of 55 c to 125 c. the sn74abt16240a is characterized for operation from 40 c to 85 c. copyright ? 1998, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. widebus and epic- ii b are trademarks of texas instruments incorporated. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1oe 1y1 1y2 gnd 1y3 1y4 v cc 2y1 2y2 gnd 2y3 2y4 3y1 3y2 gnd 3y3 3y4 v cc 4y1 4y2 gnd 4y3 4y4 4oe 2oe 1a1 1a2 gnd 1a3 1a4 v cc 2a1 2a2 gnd 2a3 2a4 3a1 3a2 gnd 3a3 3a4 v cc 4a1 4a2 gnd 4a3 4a4 3oe sn54abt16240a . . . wd package sn74abt16240a . . . dgg, dgv, or dl package (top view) on products compliant to mil-prf-38535, all parameters are tested unless otherwise noted. on all other products, production processing does not necessarily include testing of all parameters.
sn54abt16240a, sn74abt16240a 16-bit buffers/drivers with 3-state outputs scbs095g december 1991 revised october 1998 2 post office box 655303 ? dallas, texas 75265 function table (each 4-bit buffer) inputs output oe a y l h l l lh h x z logic symbol 2 47 1a1 46 1a2 44 1a3 43 1a4 1y1 2 1y2 3 1y3 5 1y4 6 41 2a1 40 2a2 38 2a3 37 2a4 2y1 8 2y2 9 2y3 11 2y4 12 36 3a1 35 3a2 33 3a3 32 3a4 3y1 13 3y2 14 3y3 16 3y4 17 30 4a1 29 4a2 27 4a3 26 4a4 4y1 19 4y2 20 4y3 22 4y4 23 en1 1 en4 24 1oe 2oe 3oe 4oe en2 48 en3 25 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. 11 12 13 14
sn54abt16240a, sn74abt16240a 16-bit buffers/drivers with 3-state outputs scbs095g december 1991 revised october 1998 3 post office box 655303 ? dallas, texas 75265 logic diagram (positive logic) 1oe 1a1 1a2 1a3 1a4 1y1 1y2 1y3 1y4 1 47 46 44 43 2 3 5 6 2oe 2a1 2a2 2a3 2a4 2y1 2y2 2y3 2y4 48 41 40 38 37 8 9 11 12 3oe 3a1 3a2 3a3 3a4 3y1 3y2 3y3 3y4 25 36 35 33 32 13 14 16 17 4oe 4a1 4a2 4a3 4a4 4y1 4y2 4y3 4y4 24 30 29 27 26 19 20 22 23 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage range applied to any output in the high or power-off state, v o 0.5 v to 5.5 v . . . . . . . . . . . . . . . . . . . current into any output in the low state, i o : sn54abt16240a 96 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sn74abt16240a 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) 18 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, q ja (see note 2): dgg package 89 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dgv package 93 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dl package 94 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. the package thermal impedance is calculated in accordance with jesd 51.
sn54abt16240a, sn74abt16240a 16-bit buffers/drivers with 3-state outputs scbs095g december 1991 revised october 1998 4 post office box 655303 ? dallas, texas 75265 recommended operating conditions (see note 3) sn54abt16240a sn74abt16240a unit min max min max unit v cc supply voltage 4.5 5.5 4.5 5.5 v v ih high-level input voltage 2 2 v v il low-level input voltage 0.8 0.8 v v i input voltage 0 v cc 0 v cc v i oh high-level output current 24 32 ma i ol low-level output current 48 64 ma d t/ d v input transition rise or fall rate outputs enabled 10 10 ns/v t a operating free-air temperature 55 125 40 85 c note 3: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions t a = 25 c sn54abt16240a sn74abt16240a unit parameter test conditions min typ 2 max min max min max unit v ik v cc = 4.5 v, i i = 18 ma 1.2 1.2 1.2 v v cc = 4.5 v, i oh = 3 ma 2.5 2.5 2.5 v oh v cc = 5 v, i oh = 3 ma 3 3 3 v v oh v cc =45v i oh = 24 ma 2 2 v v cc = 4 . 5 v i oh = 32 ma 2* 2 v ol v cc =45v i ol = 48 ma 0.55 0.55 v v ol v cc = 4 . 5 v i ol = 64 ma 0.55* 0.55 v v hys 100 mv i i v cc = 5.5 v, v i = v cc or gnd 1 1 1 m a i ozh v cc = 5.5 v, v o = 2.7 v 10 10 10 m a i ozl v cc = 5.5 v, v o = 0.5 v 10 10 10 m a i off v cc = 0, v i or v o 4.5 v 100 100 m a i cex v cc = 5.5 v, v o = 5.5 v outputs high 50 50 50 m a i o 3 v cc = 5.5 v, v o = 2.5 v 50 100 180 50 180 50 180 ma v cc = 5.5 v, outputs high 3 3 3 i cc v cc = 5 . 5 v , i o = 0, outputs low 34 34 34 ma v i = v cc or gnd outputs disabled 3 3 3 data v cc = 5.5 v, one input at 3.4 v, outputs enabled 1 1.5 1 d i cc inputs , other inputs at v cc or gnd outputs disabled 0.05 1 0.05 ma control inputs v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd 1.5 1.5 1.5 c i v i = 2.5 v or 0.5 v 3.5 pf c o v o = 2.5 v or 0.5 v 7.5 pf * on products compliant to mil-prf-38535, this parameter does not apply. 2 all typical values are at v cc = 5 v. 3 not more than one output should be tested at a time, and the duration of the test should not exceed one second. this is the increase in supply current for each input that is at the specified ttl voltage level rather than v cc or gnd.
sn54abt16240a, sn74abt16240a 16-bit buffers/drivers with 3-state outputs scbs095g december 1991 revised october 1998 5 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, c l = 50 pf (unless otherwise noted) (see figure 1) sn54abt16240a parameter from (input) to (output) v cc = 5 v, t a = 25 c min max unit min typ max t plh a y 0.8 2.7 3.8 0.8 4.8 ns t phl a y 1.1 3.1 4.3 1.1 4.9 ns t pzh oe y 1.3 3.3 4.3 1.3 5.4 ns t pzl oe y 1.4 3.4 6.2 1.4 7.2 ns t phz oe y 1.6 3.6 6.2 1.6 7.2 ns t plz oe y 1.4 3 5.1 1.4 5.7 ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature, c l = 50 pf (unless otherwise noted) (see figure 1) sn74abt16240a parameter from (input) to (output) v cc = 5 v, t a = 25 c min max unit min typ max t plh a y 1 2.7 3.8 1 4.7 ns t phl a y 1.1 3.1 4.3 1.1 4.8 ns t pzh oe y 1.3 3.3 4.3 1.3 5.3 ns t pzl oe y 1.4 3.4 6.2 1.4 7.1 ns t phz oe y 1.6 3.6 4.8 1.6 6.1 ns t plz oe y 1.4 3 5.1 1.4 5.6 ns
sn54abt16240a, sn74abt16240a 16-bit buffers/drivers with 3-state outputs scbs095g december 1991 revised october 1998 6 post office box 655303 ? dallas, texas 75265 parameter measurement information 1.5 v t h t su from output under test c l = 50 pf (see note a) load circuit s1 7 v open gnd 500 w 500 w data input timing input 1.5 v 3 v 0 v 1.5 v 1.5 v 3 v 0 v 3 v 0 v 1.5 v t w input voltage waveforms setup and hold times voltage waveforms propagation delay times inverting and noninverting outputs voltage waveforms pulse duration t plh t phl t phl t plh v oh v oh v ol v ol 1.5 v 1.5 v 3 v 0 v 1.5 v 1.5 v input 1.5 v output control output waveform 1 s1 at 7 v (see note b) output waveform 2 s1 at open (see note b) v ol v oh t pzl t pzh t plz t phz 1.5 v 1.5 v 3.5 v 0 v 1.5 v v ol + 0.3 v 1.5 v v oh 0.3 v 0 v 3 v voltage waveforms enable and disable times low- and high-level enabling output output t plh /t phl t plz /t pzl t phz /t pzh open 7 v open test s1 output control notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 w , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. 1.5 v figure 1. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9319901mxa active cfp wd 48 1 tbd a42 snpb n / a for pkg type 74ABT16240ADGGRE4 active tssop dgg 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74abt16240adggrg4 active tssop dgg 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74abt16240adgvre4 active tvsop dgv 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74abt16240adgvrg4 active tvsop dgv 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16240adggr active tssop dgg 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16240adggrg active tssop dgg 48 tbd call ti call ti sn74abt16240adgvr active tvsop dgv 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16240adl active ssop dl 48 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16240adlg4 active ssop dl 48 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16240adlr active ssop dl 48 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16240adlrg4 active ssop dl 48 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim snj54abt16240awd active cfp wd 48 1 tbd a42 snpb n / a for pkg type (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. package option addendum www.ti.com 9-oct-2007 addendum-page 1
in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 9-oct-2007 addendum-page 2
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74abt16240adggr tssop dgg 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 q1 sn74abt16240adgvr tvsop dgv 48 2000 330.0 24.4 6.8 10.1 1.6 12.0 24.0 q1 sn74abt16240adlr ssop dl 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 q1 package materials information www.ti.com 11-mar-2008 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) sn74abt16240adggr tssop dgg 48 2000 346.0 346.0 41.0 sn74abt16240adgvr tvsop dgv 48 2000 346.0 346.0 41.0 sn74abt16240adlr ssop dl 48 1000 346.0 346.0 49.0 package materials information www.ti.com 11-mar-2008 pack materials-page 2
mechanical data msso001c ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 dl (r-pdso-g**) plastic small-outline package 4040048 / e 12/01 48 pins shown 56 0.730 (18,54) 0.720 (18,29) 48 28 0.370 (9,40) (9,65) 0.380 gage plane dim 0.420 (10,67) 0.395 (10,03) a min a max 0.010 (0,25) pins ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) seating plane 0.020 (0,51) 0.040 (1,02) 25 24 0.008 (0,203) 0.0135 (0,343) 48 1 0.008 (0,20) min a 0.110 (2,79) max 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) m 0.005 (0,13) 0.025 (0,635) 0 ? 8 0.005 (0,13) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). d. falls within jedec mo-118
mechanical data mtss003d january 1995 revised january 1998 post office box 655303 ? dallas, texas 75265 dgg (r-pdso-g**) plastic small-outline package 4040078 / f 12/97 48 pins shown 0,25 0,15 nom gage plane 6,00 6,20 8,30 7,90 0,75 0,50 seating plane 25 0,27 0,17 24 a 48 1 1,20 max m 0,08 0,10 0,50 0 8 56 14,10 13,90 48 dim a max a min pins ** 12,40 12,60 64 17,10 16,90 0,15 0,05 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold protrusion not to exceed 0,15. d. falls within jedec mo-153
mechanical data mpds006c february 1996 revised august 2000 post office box 655303 ? dallas, texas 75265 dgv (r-pdso-g**) plastic small-outline 24 pins shown 14 3,70 3,50 4,90 5,10 20 dim pins ** 4073251/e 08/00 1,20 max seating plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 112 24 13 4,30 4,50 0,16 nom gage plane a 7,90 7,70 38 24 16 4,90 5,10 3,70 3,50 a max a min 6,60 6,20 11,20 11,40 56 9,60 9,80 48 0,08 m 0,07 0,40 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. d. falls within jedec: 24/48 pins mo-153 14/16/20/56 pins mo-194
mechanical data mcfp010b january 1995 revised november 1997 post office box 655303 ? dallas, texas 75265 wd (r-gdfp-f**) ceramic dual flatpack 4040176 / d 10/97 48 leads shown 48 48 25 56 0.610 (18,80) 0.710 (18,03) 0.740 0.640 0.390 (9,91) 0.370 (9,40) 0.870 (22,10) 1.130 (28,70) 1 a 0.120 (3,05) 0.075 (1,91) leads** 24 no. of a min a max (16,26) (15,49) 0.025 (0,635) 0.009 (0,23) 0.004 (0,10) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a ceramic lid using glass frit. d. index point is provided on cap for terminal identification only e. falls within mil std 1835: gdfp1-f48 and jedec mo -146aa gdfp1-f56 and jedec mo -146ab
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without 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with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband clocks and timers www.ti.com/clocks digital control www.ti.com/digitalcontrol interface interface.ti.com medical www.ti.com/medical logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security rfid www.ti-rfid.com telephony www.ti.com/telephony rf/if and zigbee? solutions www.ti.com/lprf video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2008, texas instruments incorporated

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